An integrated circuit (IC) package includes, among others, a substrate and a die placed on the substrate. The die is generally coupled to the substrate through wire bonds or solder bumps. Signals from the integrated circuit die may then travel through routing traces in the package substrate and then through second-level solder joints such as BGA (Ball Grid Array) or LGA (Land Grid Array) to external circuitry.
In integrated circuits that are used to carry out high speed and high density data transmissions, signals that are simultaneously toggling on neighboring routing traces may experience performance degradation due to undesired cross-coupling between each pair of adjacent routing traces. In an effort to reduce channel crosstalk in such scenarios, integrated circuit package designers have focused on isolating the routing traces by (i) physically increasing the distance between critical pairs of traces, (ii) inserting ground planes between pairs of traces, or (iii) routing transmit/receive channels on different package substrate layers.
In most integrated circuit package designs, however, once the package size is defined (i.e., once the horizontal surface dimension is defined), although there is flexibility with respect to reducing horizontal crosstalk through further separation of pairs of traces potentially at the cost of adding substrate layers, reducing vertical crosstalk becomes a bottleneck. As a result, it may be desirable to provide other ways of further reducing channel crosstalk.